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Conference Program Conference Tutorials Industry Forum Plenary speakers   Conference Program Home Schedule Tuesday Wednesday Thursday Day 3 - Thursday, January 6th, 2011 09:00 09:50 Keynote: High-end Processor design in Advanced CMOS Technologies Leon Stok (IBM) 09:50 11:00 Plenary Panel session Panelists: Venkataraman Balakrishnan, Purdue University; Rajesh Gupta, University of California, San Diego; S S Mahant Shetti, KarMic, Manipal, India 11:00 11:30 Tea Break Track A Track B Track C Edu. Forum 11:30 12:45 Session A7: Modeling and Synthesis Chair: Sambuddha Bhattacharya Session B7: Embedded Tutorial 3 Chair: Session C7: Test Application Chair: Ilia Polian       A7.1: A SPICE Macromodel for the Analysis of Lossy Dispersive Coupled GaAs Interconnect Line System Bhaskar Gopalan B7.1 Buildings as Cyber-Physical Energy Systems Rajesh Gupta U. of California, San Diego C7.1: Multi-CoDec Configurations for Low Power and High Quality Scan Test Arvind Jain, Sundarrajan Subramanian, Rubin Parekhji and Srivaths Ravi Texas Instruments (India) 11:30 - 12:00 Talk: TBD; Speaker: Venkataraman Balakrishnan, Purdue University     A7.2: Statistical Simulation and Modeling of Nano-scale CMOS VCO using Artificial Neural Network Soumya Pandit and Sipra Mandal University of Calcutta, Kolkata B7.2 Formal Verification Sanjit Seshia U. of California, Berkeley C7.2: Thermal-aware Test Scheduling Using On-Chip Temperature Sensors Chunhua Yao, Kewal Saluja and Parameswaran Ramanathan University of Wisconsin-Madison 12:00-12:45 Design Contest Presentations: 1. Fast and Power Efficient 16X16 Array of Array Multiplier using Vedic Multiplication M S Prahalad, University Visveswaraya College of Engineering     A7.3: A Methodology For Automatic Transistor-Level Sizing Of CMOS OpAmps Praveen Meduri and Shirshak Dhali Old Dominion University C7.3: Path Delay Tuning for Performance Gain in the face of Random Manufacturing Variations Kautalya Mishra, Ahmed Faraz, Adit Singh and Abhijit Chatterjee Auburn University and Georgia Tech 2.Targeting Small Hold Violations in Design By Increasing Net RC Sachin Mathur, ST Microelectronics, Noida 3. An Area Efficient Implementation of Vector by Vector Shifter Vasantha Srirambhatla, Santosh Kumar Puram, Ankit Garg, Sri Raghava Kiran Mukku, Ikoa Semiconductor 12:45 13:45 Lunch 13:45 15:00 Session A8: Characterization/Modeling Chair: N V Arvind Session B8: Reconfigurable systems Chair: Vijay Raghunathan Session C8: Chair:       A8.1: A Statistical Learning Based Modeling Approach and its Application in Leakage Library Characterization M. Zhang, R. Häußler, M. Olbrich, H. Kinzelbach and E. Barke Leibniz Universität Hannover and Infineon Technologies AG B8.1: A Reconfigurable Processor for Phylogenetic Inference Pei Liu, Ahmed Hemani and Kolin Paul KTH, Royal Institute of Technology and Indian Institute of Technology, Delhi CUDA Presentation by NVIDIA     A8.2: Cell Library Characterization at Low Voltage using Non-linear Operating Point Analysis of Local Variations R. Rithe, S. Chou, J. Gu, A. Wang, S. Datla, G. Gammie, D. Buss and A. Chandrakasan Massachusetts Institute of Technology, Stanford University, Maxlinear Inc. and Texas Instruments B8.2: NoC Based Distributed Partitionable Memory System for a Coarse Grain Reconfigurable Architecture Muhammad Adeel Tajammul, Muhammad Ali Shami, Ahmed Hemani and S Moorthi Royal Institute of Technology,Sweden and National Institute of Technology, Tiruchy       A8.3: Accurate Estimation of Signal Currents for Reliability Analysis Considering Advanced Waveform-Shape Effects Palkesh Jain and Ankit Jain Texas Instruments, India B8.3: Intra-Flit Skew reduction for Asynchronous Bypass Channel in NoCs Reeshav Kumar, Yoon Seok Yang and Gwan Choi Texas A&M University   15:00 15:15 Break 15:15 16:30 Session A9: Analog Techniques II Chair: Nagendra Krishnapura Session B9: Experiences with embedded systems Chair: Prabhat Mishra Session C9: Chair:       A9.1: Pseudo Concurrent Quad-Band LNA Operating in 900 MHz/1.8 GHz and 900 MHz/2.4 GHz Bands for Multi-Standard Wireless Receiver Sambit Datta, Ashudeb Dutta, Kunal Datta and Tarun Kanti Bhattacharya IIT Kharagpur and IIT Hyderabad B9.1: Low Power Asynchronous Data Acquisition Front End for Wireless Body Sensor Area Networks Sameer Sonkusale, Michael Trakimas and Sungkil Hwang Tufts University CUDA Hands-on Workshop     A9.2: Extraction of Aspect Ratio for Non-Manhattan CMOS devices Shiv Kumar, Vinay Chandratre, Sudheer K Mohammed and Chandrakant Pithawa Bhabha Atomic Research Centre B9.2: Hardware Implementation of Real-Time Speech Recognition System using TMS320C6713 DSP J. Manikandan, B. Venkataramani, K. Girish, H. Karthic and V. Siddharth NIT Trichy       A9.3: A Highly Stable Leakage-Based Silicon Physical Unclonable Functions Dinesh Ganta, Vignesh Vivekraja, Kanu Priya and Leyla Nazhandali Virginia Tech B9.3: Improving Android performance and energy efficiency Tapas Kundu and Kolin Paul IIT Delhi   End

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