VLSI Design 2010 VLSI Design 2010
VLSI Design 2010 VLSI Design 2010
Submissions  |  Registration  |  Conference Agenda  |  Sponsorship Opportunities  |  Location/Travel  |  Team Members  |  Contact Us
Conference Program
Keynote speakers
Conference Tutorials
Call for Participation
Education Forum
Industry Forum
  Conference Tutorials
Home
2010 VLSI ConferenceTutorial Program
Schedule
Monday, 4 Jan 2010
Time Session T5 Session T6 Session T7 A Session T8
9AM - 5PM Thermal Modeling and Management for 2D and 3D Multiprocessor System-on-Chip

David Atienza, EPFL

Ayse Coskun, Boston University

Jose Ayala,
Complutense University of Madrid
Model Based Design, Verification and Testing for Embedded Control Systems

Ambar Gadkari, General Motors
India Pvt. Ltd.

Ramesh S,
General Motors
India Pvt. Ltd.
Wired interfaces design (half-day)

Sakthi Prashanth, Infineon Technologies Pvt Ltd

Mayank Goel, Infineon Tecnhnologies Pvt Ltd

Ravula Lakshmi, Infineon Technologies Pvt Ltd
Low Power design Verification using IEEE P1801 aka UPF (hands-on)

Srikanth Jadcherla, Synopsys

CV Sesha Sai Kumar, Synopsys

Neha Bajaj, Synopsys
Venue: NIMHANS
Session T7B
High PPAY Embedded Memories Design & Test (half-day)

Murugeswaran Surulivel, ARM

Sudhir Moharir, ARM
  Venue: NIMHANS Venue: NIMHANS Venue: NIMHANS Venue: Synopsys
 
Home | Call for Participation | Registration | Conference Program
Sponsorship Opportunities | Location | Team Members| Contact Us | Site Map
The logos and trademarks used on this site are the property of their respective owners
[email protected]
VLSI Design conference
Web Hosting and Design by IBEE