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Program Committee |
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| Program Chairs |
Niraj K. Jha
Princeton University
[email protected] |
Rubin A. Parekhji
Texas Instruments
[email protected] |
| Architectures |
| Topics: Application-specific, Reconfigurable and Embedded Architectures, Processor/Computing Architectures, High-performance Computing, Multi-core and Network-on-chip Architectures. |
| Yuan Xie (Penn State U.) Co-chair |
Nitin Chandrachoodan (IIT Madras) |
| Aviral Shrivastava, Arizona State Univ. (USA) |
Mona Mathur, STMicroelectronics (India) |
| Eren Kursun, IBM (USA) |
Vijay Degalahal, Intel (India) |
| S. Nandy, IISc (India) |
N. Ranganathan, Univ. of Southern Florida (USA) |
| Satish Narayanasamy, Univ. of Michigan (USA) |
Hsien-Hsin Lee, Georgia Institute of Technology (USA) |
| Jiang Xu, Hongkong Univ. of Science and Technology (Hongkong) |
Manish Vachharajani, Univ. of Colorado, Boulder (USA) |
| Shankar Balachandran, IIT Madras (India) |
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| VLSI CAD |
| Topics: High-level synthesis, Register-level Optimizations, Logic Synthesis, Technology Mapping, Physical Design. |
| Puneet Gupta (UCLA) |
Vamsi Bopanna (Xilinx India) |
| Ruchir Puri, IBM (USA) |
Sherief Reda, Brown Univ. (USA) |
| Deming Chen, Univ. of Illinois UC (USA) |
Masahiro Fujita, Univ. of Tokyo (Japan) |
| Padmini Gopalakrishnan, Xilinx (India) |
Supratik Chakraborty, IITBombay (India) |
| Satya Gupta |
Cho Moon, Synopsys (USA) |
| Kaushik De, Synopsys (India) |
Jagdish Rao, Texas Instruments (India) |
| Shabbir Batterywala, Synopsys (India) |
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| Front-end Design |
| Topics: ESL Design Flows, Hardware-software Co-design, System-on-a-chip Synthesis, Performance Analysis and Profiling, Embedded Software Tools, Emulation-based Prototyping. |
| Robert Dick (U. Michigan) |
M. Balakrishnan (IIT Delhi) |
| Anshul Kumar, IIT Delhi (India) |
Kolin Paul, IIT Delhi (India) |
| Rajat Moona, IIT Kanpur (India) |
Basant Dwivedi, CoWare (India) |
| Anup Gangwar, AMD (India) |
Prabhat Misra, Univ. of Florida (USA) |
| Lei Yang, Google, Inc. (USA) |
Tulika Mitra, National Univ. of Singapore (Singapore) |
| Sudeep Pasricha, Colorado State Univ. (USA) |
Marcello Lajolo, NEC Labs. (USA) |
| Pai Chou, Univ. of California (USA) |
Kazu Wakabayashi, NEC Corp. (Japan) |
| Sri Parameswaran, Univ. of New South Wales (Australia) |
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| Test and Verification |
| Topics: Verification: Simulation and Formal Techniques; DFT, Test Methodologies, BIST, Yield. |
| Vishwani Agrawal (Auburn U.) |
Alok Jain (Cadence India) |
| Adit Singh, Auburn Univ. (USA) |
Krishnendu Chakrabarty, Duke Univ. (USA) |
| Aarti Gupta, NEC Labs. (USA) |
Kewal Saluja, Univ. of Wisconsin (USA) |
| Loganathan Lingappan, Intel (USA) |
Subhasish Mitra, Stanford Univ. (USA) |
| Raj Mitra - [email protected], Texas Instruments (India) |
Nagesh Tamarapalli, AMD (India) |
| Bhargab Bhattacharya, ISI (India) |
Virendra Singh, IISc (India) |
| Sandeep Pagey, Cadence Design Systems (India) |
Pallab Dasgupta, IIT Kharagpur (India) |
| Nilanjan Mukherjee, MGC (USA) |
Kartik Mohanram, Rice Univ. (USA) |
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| Low-power Design |
| Topics: Power-aware Design, Temperature-aware Design, Power Analysis, Thermal Analysis. |
| Swarup Bhunia (Case Western U.) |
Susmita Sur-Kolay (ISI Calcutta) |
| Saibal Mukhopadhyay, Georgia Institute of Technology (USA) |
Li Shang, Univ. of Colorado (USA) |
| Anand Raghunathan, Purdue Univ. (USA) |
Vivek De, Intel (USA) |
| Saraju Mohanty, Univ. of North Texas (USA) |
Nagi Naganathan, LSI Logic (USA) |
| Jong Sung Park, Korea University (South Korea) |
Milind Padhye, Freescale (USA) |
| Yiran Chen, Seagate (USA) |
Sriram R Vangal, Intel (USA) |
| Pradip Bose, IBM (USA) |
Bibiche M Geuskens, Intel (USA) |
| Ajit Pal, IIT Kharagpur (India) |
Santanu Chattopadhyay, IIT Karagpur (India) |
| Vinoo Srinivasan, Intel (India) |
Subhrajit Bhattacharya, IBM (India) |
| Maryam Shojaei Baghini, IIT Bombay (India) |
B G Madhu Rao, Texas Instruments (India) |
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| Circuits and Technologies |
| Topics: Process Technology, DFM, Memories, Circuits, Analog/Mixed-signal/RF Design, Technology CAD, Packaging and Reliability, Board Design. |
| Durgamadhab Misra (NJIT) |
Dinesh Sharma (IIT Bombay) |
| Amit Patra, IIT Kharagpur (India) |
Nagendra Krishnapura, IIT Madras (India) |
| Prakash Easwaran, Cosmic Circuits (India) |
Rajiv Joshi, IBM (USA) |
| Shanthi Pavan, IIT Madras (India) |
V. Ramgopal Rao, IIT Bombay (India) |
| Zhi Chen, Univ. of Kentucky (USA) |
Karim S. Karim, Univ. of Waterloo (Canada) |
| Srinivasan, Purushothaman, Texas Instruments (USA) |
X. Maggie Wang, Villanova Univ. (USA) |
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| Emerging Applications and Technologies |
| Topics: CMOS Sensors, MEMS, Nano-scale Computing and Architectures, Medical and Automotive Electronics, Healthcare, Entertainment, Ambient Intelligence, Sensor Networks, Audio/Image/Video Processing, Security, Compression. |
| Vijaykrishnan Narayanan (Penn State U.) |
V.Kamakoti (IIT Madras) |
| Sanjuktha Bhanja, Univ. of South Florida (USA) |
T.Kocak, Univ. of Bristol (UK) |
| Debdeep Mukhopadhyay, IIT Kharagpur (India) |
Krishna Sivalingam, IIT Madras (India) |
| Vivekananda Vedula, Intel (India) |
Yehia Massoud, Rice University (USA) |
| Naehyuck Chang, Seoul National Univ. (S.Korea) |
Carlotta Guiducci, EPFL (Switzerland) |
| K.Sridharan, IIT Madras (India) |
Joerg Henkel, Univ. Of Karlsruhe (Germany) |
| Srimat Chakradhar, NEC Labs. (USA) |
Vijay Raghunathan, Univ. of Purdue (USA) |
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