SANTOSH KUMAR JINAGAR
Santoshkumar Jinagar has 18 Years of semiconductor industry experience, spanning over ASIC front end design flow with focus on Functional Verification. He has technical expertise in various domains like High Speed Serial Cores, Serial Bus Protocols, Memory BIST and Embedded Systems Design. He has worked extensively in functional verification domain and architect-ed constrained random verification environments for various IPs. He has published papers in various industry forums and has few innovation to his credit. He earned is Bachelors in Electronics and Communication Engineering from Karnataka University Dharwad.